Verification & Test Plan

Verification Strategy

Need: (TEST) Verification shall demonstrate that :need:`REQ_SAFETY_001`, :need:`REQ_SAFETY_002`, :need:`REQ_SAFETY_003`, and all functional requirements are met through unit tests and integration tests. TEST_VERIFY_001 _images/arrow-right-circle.svg
status: active
tags: v&v, strategy

Test Methods Overview

Need: (TEST) Unit tests shall verify individual components (:need:`ARCH_FUNC_001` Sensor Driver, :need:`ARCH_FUNC_002` Filter, :need:`ARCH_FUNC_003` State Machine) in isolation. TEST_METHOD_001 _images/arrow-right-circle.svg
status: active
tags: unit-test
links incoming: TEST_METHOD_002
Need: (TEST) Integration tests shall verify end-to-end data flow from sensor input to state output (:need:`ARCH_001` TSIM). TEST_METHOD_002 _images/arrow-right-circle.svg
status: active
tags: integration-test
links outgoing: TEST_METHOD_001, ARCH_001
Need: (TEST) Timing tests shall verify that all processing occurs within 100ms as specified in :need:`REQ_SAFETY_002`. TEST_METHOD_003 _images/arrow-right-circle.svg
status: active
tags: timing-test
links outgoing: REQ_SAFETY_002, ARCH_FUNC_003
links incoming: TEST_END_TO_END_001

Unit Test Cases

Need: (TEST) TEST_CONVERSION_001: Sensor readings across full range (-40°C to +125°C) shall convert correctly per :need:`REQ_FUNC_001`. TEST_CONVERSION_001 _images/arrow-right-circle.svg
status: active
tags: unit-test, sensor-driver
links incoming: TEST_CODE_001

Test Steps:

  1. Input ADC values: 0, 1024, 2048, 3072, 4095 LSB

  2. Verify output temperature: -40°C, -17.5°C, 42.5°C, 102.5°C, ~125°C

Pass Criteria: All conversions within ±1°C accuracy

Architecture: (ARCH) The Sensor Driver sh... (ARCH_FUNC_001), (ARCH) Raw Temperature Sign... (ARCH_SIGNAL_001)

Need: (TEST) TEST_FILTER_001: Noise filtering with 5-sample moving average shall suppress sensor noise per :need:`REQ_FUNC_002`. TEST_FILTER_001 _images/arrow-right-circle.svg
status: active
tags: unit-test, filter
links incoming: TEST_CODE_001

Test Steps:

  1. Input noisy sequence: [50, 60, 45, 55, 50, 48, 52, 49]°C

  2. After 5 samples, filter output shall stabilize around 50°C

Pass Criteria: Noise amplitude reduced by ≥80%

Architecture: (ARCH) The Temperature Filt... (ARCH_FUNC_002), (ARCH) Temperature Reading ... (ARCH_SIGNAL_002)

Need: (TEST) TEST_THRESHOLD_001: State machine shall transition to UNSAFE when temperature ≥ 100°C per :need:`REQ_FUNC_003`. TEST_THRESHOLD_001 _images/arrow-right-circle.svg
status: active
tags: unit-test, state-machine

Test Steps:

  1. Set initial state: SAFE (T=50°C)

  2. Inject temperature: 100°C

  3. Verify state output: UNSAFE

Pass Criteria: State transition occurs on first call after threshold exceeded

Architecture: (ARCH) The State Machine sh... (ARCH_FUNC_003), (ARCH) Temperature monitori... (ARCH_DESIGN_001)

Need: (TEST) TEST_HYSTERESIS_001: State machine shall transition to SAFE only when temperature ≤ 95°C (hysteresis) per :need:`REQ_FUNC_004`. TEST_HYSTERESIS_001 _images/arrow-right-circle.svg
status: active
tags: unit-test, state-machine, hysteresis
links incoming: TEST_CODE_001

Test Steps:

  1. Set state: UNSAFE (T=100°C)

  2. Lower temperature to 99°C (still below hysteresis) → state remains UNSAFE

  3. Lower temperature to 95°C → state transitions to SAFE

Pass Criteria: Hysteresis deadband prevents spurious oscillations

Integration Test Cases

Need: (TEST) TEST_END_TO_END_001: Full sensor-to-state pipeline shall operate within latency budget per :need:`REQ_SAFETY_002`. TEST_END_TO_END_001 _images/arrow-right-circle.svg
status: active
tags: integration-test, timing

Test Steps:

  1. Simulate analog sensor input ramping from 25°C to 105°C

  2. Measure time from input change to state output change

Pass Criteria: End-to-end latency ≤ 50ms (margin within 100ms requirement)

Architecture: (ARCH) The Thermal Sensor I... (ARCH_001), (ARCH) The State Machine sh... (ARCH_FUNC_003)

Need: (TEST) TEST_ERROR_RECOVERY_001: Module shall recover gracefully from persistent sensor errors per :need:`ARCH_ERROR_001`. TEST_ERROR_RECOVERY_001 _images/arrow-right-circle.svg
status: active
tags: integration-test, error-handling

Test Steps:

  1. Inject invalid readings (<-50°C or >150°C range)

  2. Verify state remains unchanged for up to 9 errors

  3. Inject valid reading; verify normal operation resumes

Pass Criteria: State unchanged during error sequence; recovery successful

Architecture: (ARCH) If sensor reading is... (ARCH_ERROR_001)

Need: (TEST) TEST_FAIL_SAFE_001: After 10 consecutive sensor failures, module shall enter UNSAFE state per :need:`ARCH_ERROR_002`. TEST_FAIL_SAFE_001 _images/arrow-right-circle.svg
status: active
tags: integration-test, fail-safe, safety

Test Steps:

  1. Inject 10 consecutive invalid readings

  2. Verify state transitions to UNSAFE

  3. Confirm recovery pathway when valid readings resume

Pass Criteria: UNSAFE state triggered; system alerts integrating system

Architecture: (ARCH) The module shall tra... (ARCH_ERROR_002), (ARCH) The TSIM shall be a ... (ARCH_SEOOC_001)

Traceability Matrix

@startuml TSIM_Traceability

skinparam backgroundColor #FAFAFA

title TSIM Traceability Matrix\nRequirements > Architecture > Verification

rectangle "Safety Goals" #FFE0B2 {
	usecase "SG: Prevent\nthermal damage" as SG1
}

rectangle "Safety Requirements" #FFCCCC {
	usecase "REQ_SAFETY_001\nGoal definition" as SR1
	usecase "REQ_SAFETY_002\nDetect within 100ms" as SR2
	usecase "REQ_SAFETY_003\nReport safe state" as SR3
}

rectangle "Functional Requirements" #E1BEE7 {
	usecase "REQ_FUNC_001\nADC conversion" as FR1
	usecase "REQ_FUNC_002\nNoise filtering" as FR2
	usecase "REQ_FUNC_003\nThreshold ≥100°C" as FR3
	usecase "REQ_FUNC_004\nHysteresis ≤95°C" as FR4
}

rectangle "Architecture" #C8E6C9 {
	usecase "ARCH_FUNC_001\nSensor Driver" as AF1
	usecase "ARCH_FUNC_002\nFilter" as AF2
	usecase "ARCH_FUNC_003\nState Machine" as AF3
	usecase "ARCH_ERROR_002\nFail-safe" as AE2
}

rectangle "Verification & Test" #B3E5FC {
	usecase "TEST_CONVERSION_001\nRange accuracy" as T1
	usecase "TEST_FILTER_001\nNoise rejection" as T2
	usecase "TEST_THRESHOLD_001\n100°C detection" as T3
	usecase "TEST_HYSTERESIS_001\n95°C recovery" as T4
	usecase "TEST_END_TO_END_001\nLatency ≤50ms" as T5
	usecase "TEST_FAIL_SAFE_001\n10 failures" as T7
}

SG1 --> SR1
SG1 --> SR2
SG1 --> SR3

SR2 --> FR1
SR2 --> FR2
SR2 --> FR3
SR3 --> FR4

FR1 --> AF1 : implemented
FR2 --> AF2 : implemented
FR3 --> AF3 : implemented
FR4 --> AF3 : implemented

AF1 --> T1 : verified
AF2 --> T2 : verified
AF3 --> T3 : verified
AF3 --> T4 : verified
AF3 --> T5 : verified
AE2 --> T7 : verified

SR2 --> T5 : verified

note bottom
	Complete traceability from
	safety goals through architecture
	to test verification
end note

@enduml

Complete Requirements-to-Test Traceability - Architecture: (ARCH) The Thermal Sensor I... (ARCH_001) | Safety: (SG) Prevent thermal damage... (REQ_SAFETY_001), (SR) The system shall detec... (REQ_SAFETY_002), (SR) The system shall repor... (REQ_SAFETY_003)

Detailed Traceability Table

Requirements to Test Coverage

Requirement

Test Case

Status

Coverage Notes

(SG) Prevent thermal damage... (REQ_SAFETY_001)

(TEST) TEST_THRESHOLD_001: ... (TEST_THRESHOLD_001)

Active

Safety goal foundation

(SR) The system shall detec... (REQ_SAFETY_002)

(TEST) TEST_THRESHOLD_001: ... (TEST_THRESHOLD_001), (TEST) TEST_END_TO_END_001:... (TEST_END_TO_END_001)

Active

Detects & reports within 100ms

(SR) The system shall repor... (REQ_SAFETY_003)

(TEST) TEST_HYSTERESIS_001:... (TEST_HYSTERESIS_001), (TEST) TEST_FAIL_SAFE_001: ... (TEST_FAIL_SAFE_001)

Active

Recovery & fail-safe behavior

(FR) The module shall read ... (REQ_FUNC_001)

(TEST) TEST_CONVERSION_001:... (TEST_CONVERSION_001)

Active

Sensor reading accuracy (-40 to +125°C)

(FR) The module shall filte... (REQ_FUNC_002)

(TEST) TEST_FILTER_001: Noi... (TEST_FILTER_001)

Active

Noise filtering (≥80% reduction)

(FR) The module shall trigg... (REQ_FUNC_003)

(TEST) TEST_THRESHOLD_001: ... (TEST_THRESHOLD_001)

Active

Threshold detection at 100°C

(FR) The module shall trigg... (REQ_FUNC_004)

(TEST) TEST_HYSTERESIS_001:... (TEST_HYSTERESIS_001)

Active

Hysteresis deadband (95°C recovery)

(ARCH) The Sensor Driver sh... (ARCH_FUNC_001)

(TEST) TEST_CONVERSION_001:... (TEST_CONVERSION_001)

Active

100Hz sampling implementation

(ARCH) The Temperature Filt... (ARCH_FUNC_002)

(TEST) TEST_FILTER_001: Noi... (TEST_FILTER_001)

Active

5-sample moving average

(ARCH) The State Machine sh... (ARCH_FUNC_003)

(TEST) TEST_THRESHOLD_001: ... (TEST_THRESHOLD_001), (TEST) TEST_HYSTERESIS_001:... (TEST_HYSTERESIS_001)

Active

State machine logic

(ARCH) Temperature monitori... (ARCH_DESIGN_001)

(TEST) TEST_THRESHOLD_001: ... (TEST_THRESHOLD_001), (TEST) TEST_HYSTERESIS_001:... (TEST_HYSTERESIS_001)

Active

Hysteresis state machine

(ARCH) The module shall tra... (ARCH_ERROR_002)

(TEST) TEST_FAIL_SAFE_001: ... (TEST_FAIL_SAFE_001)

Active

Fail-safe error handling

Test Execution & Reporting

Need: (TEST) All unit tests shall execute in ≤ 1 second; integration tests in ≤ 5 seconds. TEST_EXEC_001 _images/arrow-right-circle.svg
status: active
tags: performance, ci-cd
Need: (TEST) Test results shall be exported in JUnit XML format for traceability reporting via sphinx-test-reports. TEST_REPORT_001 _images/arrow-right-circle.svg
status: active
tags: reporting, artifact

Integration: Configure sphinx-test-reports in conf.py to import test results into this documentation for automated compliance artifact generation.